Flip Chip Bonding

AdvaFab’s solution is to deposit solder bumps on the ASIC wafers and apply a thin film Under-Bump Metallization (UBM) on the sensor side. The wafer bumping technology suits for flip chip bonding semiconductor or compound semiconductor dies together. Typically, better than 99.9% interconnect yield is required for sensors used for imaging purposes. Reaching this yield requires very uniform solder bump height distribution over the chips and well controlled flip chip bonding process.

AdvaFab has participated in flip chip production of several high-energy physics projects. Flip chip bonding of thin chips (especially thinned ASICs) is known to be challenging. The company has developed its proprietary thin chip bonding technique that has been successfully applied for 4 cm x 4 cm, 300 um thick CERN ATLAS ITk quad modules.

The success in flip chip bonding large-area semiconductor chips with very high interconnect density or Through Silicon Vias (TSV) is dependent on several factors:

1. Quality and uniformity of the solder bumps.
2. Under-bump metallization structure and its cleanliness.
3. Cleanliness of the chips; particles impact the bonding results and contaminate the tools and cause failure in flip chip bonding.
4. Thickness and curvature of the chips to be bonded.
5. Coefficient of thermal expansion of difference between the chips to be bonded vs. bonding temperature.
6. Size of the sensor chip and density of pixels
7. Allowed thermal budget and choosing suitable solder alloy for flip chip/BGA interconnects..
8. Sensitivity of the sensor surface for mechanical damage (i.e., scratches).
9. Actual flip chip bonding and solder reflow steps.

AdvaFab provides a commercial flip chip service for our customers’ high-value components. In addition to production-oriented work, R&D services are available based on customers’ needs.The AdvaFab team has been involved in flip chip bonding of hybrid pixel detectors with various sensor materials since 2002 developing special competences. The team composes of professional who have solved a great number of technological issues.

The typical sensor materials flip chip bonded are Si, GaAs and Cd(Zn)Te. These materials can be flip chip bonded up to chip thickness of 5 mm. The minimum size 4 mm x 4 mm and the maximum ASIC size is 5 cm x 5 cm. The sensors can be, however much larger as they can be moved on the bonding chuck after each flip chip placement. AdvaFab’s process suits for FC bonding of semiconductor/compound semiconductor chips with high interconnect density.

Rework means de-bonding the hybrid and removing the ASIC from the sensor chip to swap the malfunctioning chip to a functioning. The typical reason for rework is to replace the ASICs with hidden flaws that weren’t caught by the wafer-level probing. In the rework process, the sensor module will be heated well above the melting point of the solder alloy and the ASIC will be pulled off from the sensor. The rework process is a very valuable, because it will reduce very expensive silicon waste. It is particularly important for large monolithic Si/CdTe/GaAs sensors where several ASICs have been flip chip bonded on the sensor where the probability of a flawed ASIC or interconnects has been increased. The rework process is available for Si/GaAs/Cd(Zn)Te sensor materials. The rework can be done if the sensors have been kept in clean room environment and the modules haven’t been clued or contaminated in other ways.